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13. Memories

This section describes the different memories in the ATtiny24/44/84. The AVR architecture has

two main memory spaces, the Data memory and the Program memory space. In addition, the

ATtiny24/44/84 features an EEPROM Memory for data storage. All three memory spaces are lin-

ear and regular.

13.1 In-System Re-programmable Flash Program Memory

The ATtiny24/44/84 contains 2/4/8K byte On-chip In-System Reprogrammable Flash memory

for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as

1024/2048/4096 x 16.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny24/44/84

Program Counter (PC) is 10/11/12 bits wide, thus addressing the 1024/2048/4096 Program

memory locations. Memory Programming on page 180 contains a detailed description on Flash

data serial downloading using the SPI pins.

Constant tables can be allocated within the entire Program memory address space (see the

LPM Load Program memory instruction description).

Timing diagrams for instruction fetch and execution are presented in Instruction Execution Tim-

ing on page 28.

Figure 13-1. Program Memory Map

13.2 SRAM Data Memory

Figure 13-2 on page 32 shows how the ATtiny24/44/84 SRAM Memory is organized.

The lower 160 Data memory locations address both the Register File, the I/O memory and the

internal data SRAM. The first 32 locations address the Register File, the next 64 locations the

standard I/O memory, and the last 128/256/512 locations address the internal data SRAM.

The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-

ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register

File, registers R26 to R31 feature the indirect addressing pointer registers.

The direct addressing reaches the entire data space.

The Indirect with Displacement mode reaches 63 address locations from the base address given

by the Y- or Z-register.

0x0000

x FF x 7FF xFFF

Program Memory

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